The present disclosure relates generally to the field of semiconductor processing and, more particularly, to a method and system for improving electrical characteristics of dielectrics having a high dielectric constant.
An integrated circuit (IC) is formed by creating one or more devices (e.g., circuit components) on a semiconductor substrate using a fabrication process. As fabrication processes and materials improve, semiconductor device geometries have continued to decrease in size since such devices were first introduced several decades ago. For example, current fabrication processes are producing devices having geometry sizes (e.g., the smallest component (or line) that may be created using the process) of less than 0.1 μm. However, the reduction in size of device geometries frequently introduces new challenges that need to be overcome.
As semiconductor devices, such as metal oxide semiconductor field effect transistors (MOSFETs), are scaled below 0.1 μm, ultra thin SiO2 gate oxide dielectric films that form portions of the devices may exhibit undesirable leakage current. In order to minimize leakage current while maintaining high drive current, high equivalent oxide thickness (EOT) may be achieved by using thinner films with higher dielectric constants (k). EOT is a thickness value used to compare the performance of MOS gate dielectrics having a dielectric constant that is different than SiO2 with the performance of SiO2 MOS gate dielectrics. For example, EOT may be used to represent the SiO2 gate oxide thickness required to obtain the same gate capacitance as would be obtained with the alternate dielectric featuring the different dielectric constant k. One method of reducing the EOT is by placing a high-k dielectric film (a film having a dielectric constant k greater than that of SiO2) immediately over the gate of a MOSFET or over the area where the high-k dielectric becomes the gate of a MOSFET. However, high-k dielectric films may not have the desired electrical properties needed for a particular device design, and therefore, post processing may be necessary. Such post processing adds complexity to the fabrication process and increases production time and costs.
Accordingly, what is needed in the art is a integrated circuit device and method thereof that addresses the above discussed issues.